The present invention relates to an interconnect substrate, a semiconductor device, methods of manufacturing the same, a circuit board, and electronic equipment.
A multilayer substrate has been used in the case where a high-density interconnect structure is necessary. For example, a multilayer substrate has been used as an interposer in a package capable of high density mounting such as ball grid array (BGA) and chip scale/size package (CSP). As a conventional method of manufacturing a multilayer substrate, there is known a method of stacking substrates having an interconnect pattern formed by etching copper foil, and electrically connecting the upper and lower interconnect patterns by forming via holes in the substrates and filling or plating the via holes with a conductive material.
According to the conventional method, since a photolithographic step must be performed for etching, a mask is necessary. The mask is expensive. Moreover, since the via holes must be formed larger for filling or plating the via holes with a conductive material, an increase in density of the interconnect structure is prevented. In the case of forming through holes by plating the via holes, since a space is formed inside the through holes, moisture removal must be taken into consideration. In the case of mechanically forming the via holes after stacking three or more substrates, the via holes cannot be formed in the substrate in the intermediate layer.